1. Field of the Invention
The present invention generally relates to semiconductor memory devices, and particularly relates to a semiconductor memory device which stores data in ferroelectric memory cells.
2. Description of the Related Art
1T1C (one-transistor one-capacitor) ferroelectric memories store one-bit information in a single memory cell. The memory cell stores electric charge in the case of data “1”, and does not store electric charge in the case of data. In order to sense the data stored in this memory cell, a reference potential is generated that is larger than “0” data and smaller than “1” data, and the relative magnitudes of the reference potential and the data potential are amplified by a sense amplifier.
For the generation of the reference potential, a reference cell is used that has substantially the same circuit structure as the memory cell, and that has larger size than the memory cell. The electrical characteristics of memory cells using ferroelectrics deteriorate due to repeated polarization reversals or due to the long-term retention of the same data. The reference cell for use in the reference-voltage generation circuit also suffers the degradation of its electrical characteristics.
The way degradation occurs over time differs between the memory cell retaining “1” data and the memory cell retaining “0” data. In general, the reference cell has the same degradation characteristics as the memory cell that retains “0” data. Accordingly, a sense margin required to sense “0” data is constant regardless of the degree of deterioration with time. With respect to “1” data, however, the sense margin decreases as deterioration progresses with time. Moreover, since the frequency of access differs between the memory cell and the reference cell, the deterioration characteristics are not completely the same between the memory cell retaining “0” data and the reference cell.
Because of this, it is difficult to set the reference potential to a proper level by anticipating, at the time of shipping out of ferroelectric memories from the factory, the degradation of the characteristics that will occur in the future.
Accordingly, the present invention is aimed at providing a 1T1C ferroelectric memory that is capable of detecting “0” data and “1” data without using the reference potential generated by a reference cell.
[Patent Document 1] Japanese Patent Application Publication No. 2001-202776
[Patent Document 2] Japanese Patent Application Publication No. 2000-285682